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Texas Instruments TMS320C6748 Fixed and Floating-Point DSP is a low-power applications processor based on a C674x DSP core. This DSP provides significantly lower power than other members of the TMS320C6000™ platform of DSPs. The device enables original-equipment manufacturers (OEMs) and original design manufacturers (ODMs) to bring to market devices quickly. These devices come with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed-processor solution.
Features
375MHz and 456MHz C674x Fixed and floating-point VLIW DSP
C674x Instruction set features
Superset of the C67x+ and C64x+ ISAs
Up to 3648MIPS and 2746MFLOPS
Byte-addressable (8, 16, 32, and 64-Bit data)
8-Bit overflow protection
Bit-field extract, set, clear
Normalization, saturation, bit-counting
Compact 16-Bit instructions
C674x Two-level cache memory architecture
32KB of L1P Program RAM/cache
32KB of L1D Data RAM/cache
256KB of L2 Unified mapped RAM/cache
Flexible RAM/cache partition (L1 and L2)
Enhanced direct memory access controller 3 (EDMA3)
TMS320C674x Floating-point VLIW DSP core
Load-store architecture with non-aligned support
64 General-purpose registers (32-Bit)
Six ALU (32- and 40-Bit) functional units
Two multiple functional units
Instruction packing reduces code size
All instructions conditional
Hardware support for modulo-loop operation
Protected mode operation
Exceptions support error detection and program redirection
Software support
TI DSP BIOS
Chip support library and DSP library
128KB of RAM Shared memory
1.8V or 3.3V LVCMOS I/Os (Except for USB and DDR2 interfaces)
Two external memory interfaces
EMIFA
DDR2/Mobile DDR Memory controller
Three configurable 16550-Type UART modules
LCD Controller
Two Serial Peripheral Interfaces (SPIs) each with multiple chip selects
Two Multimedia Card (MMC)/Secure Digital (SD) card interfaces with secure data I/O (SDIO) interfaces
Two master and slave inter-integrated circuits (I2C Bus™)
One Host-Port Interface (HPI) with 16-Bit-wide muxed address and data bus for high bandwidth
Programmable Real-Time Unit Subsystem (PRUSS)
USB 1.1 OHCI (Host) With Integrated PHY (USB1)
USB 2.0 OTG Port With Integrated PHY (USB0)
One Multichannel Audio Serial Port (McASP)
Two Multichannel Buffered Serial Ports (McBSPs)
10/100 Mbps Ethernet MAC (EMAC)
Video Port Interface (VPIF)
Universal Parallel Port (uPP)
Serial ATA (SATA) controller
Real-Time Clock (RTC) with 32kHz oscillator and separate power rail
Three 64-Bit general-purpose timers (Each configurable as Two 32-Bit timers)
One 64-Bit general-purpose or watchdog timer (Configurable as Two 32-Bit General-Purpose Timers)
Two Enhanced High-Resolution Pulse Width Modulators (eHRPWMs)
